物理设计工程师（工作地点可选合肥/上海）

Position Description:

Work on physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design. The responsibility includes participating in or leading next generation PHY IP physical design, methodology and flow development.

Position Requirement:

Must have BS degree with 5+ years of applicable experience, MS degree with 3+ years of applicable experience in microelectronics, electrical engineering. Essential that the candidate demonstrates strong communication skill. Have demonstrated successful completion of 6+ design projects as an individual contributor. Experienced with ASIC design flow, hierarchical physical design strategies, and methodologies and understand deep sub-micron technology issues. Solid knowledge on low power design, STA, EMIR/SI analysis, physical verification and DFM. Successful track records on tape out complex advanced node projects. Self motivated and able to work as good individual contributor.

职位描述：             
 物理设计实施工作，包括楼层规划、电网设计、地点和路线、时钟树合成、定时关闭、电源/信号完整性签署、物理验证（DRC/LVS/天线）、EM/IR签署、DFM关闭。候选人将有机会从事多种具有挑战性的设计，即低功耗和高速设计。职责包括参与或领导下一代PHY IP物理设计、方法和流程开发。
职位要求：              
必须具有理学学士学位，5年以上相关工作经验，理学硕士学位，3年以上微电子、电气工程相关工作经验。应聘者必须具备很强的沟通能力。以个人贡献者的身份成功完成了6个以上的设计项目。有ASIC设计流程、分层物理设计策略和方法的经验，了解深亚微米技术问题。扎实的低功耗设计、STA、EMI/SI分析、物理验证和DFM知识。在磁带输出复杂的高级节点项目上成功跟踪记录。自我激励，能够作为优秀的个人贡献者工作。